Quality Improvement in Semiconductor Production: Mitigating Missing Pin Defects through LSS Techniques


Digital Object Identifier (DOI)

https://doi.org/10.1007/978-981-95-4717-3_36


Authors

MENESES, JAMES LOUIE

College of Engineering

ENRIQUEZ, NOE

Adamson University, Manila

MABUTING, ROLAND EMERSON

College of Engineering

AMAGO, JERICO

College of Engineering

ARCELO, DARWIN

College of Engineering

Abstract

This study aims to enhance the overall yield performance from 97.10% to 98.20% by reducing missing pin defects. Analysis identified machine abnormality, specifically a misaligned blade guide, as the primary cause of the defects. Using an applied research design focused on quality improvement, the study employed Lean Six Sigma (LSS) approach and the DMAIC methodology. Initial binomial process capability analysis revealed that missing pin defects resulted in a low Process Z of 1.9823, equating to 23,725 defects per million opportunities (DPMO) and a 3.50 sigma level. A why-why analysis confirmed that the root cause was the blade guide misalignment. An improvement in the process was done for blade adjustment, setting it to a standard measure of 0.9 mm with 11 pins. This adjustment was implemented through revised work instructions and control plan to sustain improvements. Ultimately, the result of missing pin defects was reduced by 73%, from 2.37% to 0.63%. While the process z increased from 1.9823 to 2.50, meeting the standard threshold of 2 or greater. Additionally, defects decreased from 24,019 DPMO to 6,274 DPMO, and the sigma level improved from 3.50 to 4.0.

Keywords

Binomial process capability
DMAIC
LSS
process z
missing pin defect